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Memory related definitions

  • SDRAMs (Synchronous Dynamic RAM) is so called because it can keep two sets of memory addresses open simultaneougly. By transferring data alternately from one set of addresses and then the other, SDRAM cuts down on the delays associated with non-synchrounous RAM, which msut close one address bank before opening the next.

  • DIIMMs (Dual In-line Memory Modlues) are a faster and more capacious form of RAM than SIMMS and do not need to be installed in paris.

  • DDR-DIMM (Double Data Rate DIMM) utilizes the JEDEC standard for Double Dat Rate SDRAM. It provides two data transfers per clock. The clock is differential. The data is registered when the CK goes high (the + side) and /ck goes low ( the - side)

  • DDR2-DIMM (Double Data Rate DIMM) offers greater bandwidth and density in a smaller package along with a reduction in power consumption. In addtion DDR2 offers new features and functions that enable a higher clock and data rate opterations of 400MHz, 533MHz and 667MHz. DDrs transfers 64 bits of data twice every clock cycle. DDR2 is not compatible with DDR memory.

  • SPD (Serial Presence Detect) is a new feature available on a number of SDRAM DIMM modules that solves industry-wide compatibility problems by making it easier for the BIOS to properly configure the system to fit SDRAM performance profiles. The SPD device is an 8-pin serial EEPROM chip that stores information about the DIMM module's size, speed, voltage, drive strength, and number of row and column addresses. When the BIOS reads these parameters during POST, it automatically adjusts values in the CMOS Chipset Features screen for maximum reliability and performance.

  • tCL (CAS Latency) is the number of memory clocks it takes a DRAM to return data after the read CAS_L is asserted depends on the memory clock frequency. The value that BIOS programs into the memory controller is a function of the target clock frequency. The target clock frequency is determined from the supported CAS latencies at given clock frequencies of each DIMM.

  • tRCD (RAS-to-CAS Delay) is the parameter defined in SPD byte 29 and it has 1/4ns granularity. BIOS should read and convert this value into a number of DRAM clocks using the target frequency obtained in "tCL (CAS Latency)". Typically, this value is 48h for DDR333, which maps to 18 ns or 3 clocks.

  • tRAS (Active-to-Precharge Delay) is the parameter defined in SPD byte 30 and it has 1-ns granularity. BIOS should read and convert this value into a number of DRAM clocks using the target frequency obtained in "tCL (CAS Latency)". Typically, this value is 2Ah for DDR333, which maps to 42 ns or 7 clocks.

  • tRP (Precharge Command Period) is the parameter defined in SPD byte 27 and it has 1/4-ns granularity. BIOS should read and convert this value into a number of DRAM clocks using the target frequency obtained in "tCL (CAS Latency)". Typically, this value is 48h for DDR333, which maps to 18 ns or 3 clocks.

  • Single Rank Memory defines a set of DRAM chips (on a module) comprising 8 byte wide (64 bits) data, or 9 bytes (72 bits) with ECC. All devices in a Rank are connected by a single Chip-Select. The actual memory size is not defined. Single-sided memory modules are always Single-Rank. Double-sided unbuffered DIMMS and SODIMMS are always Dual-Rank. Server DIMMS may have up to 4 ranks. Single-rank memory modules will allow a server to reach its maximum memory capacity and highest performance levels, whilst enabling support forthe latest server chipset and motherboard features

  • Dual Rank Memory defines 2 sets of DRAM chips (on a module) each comprised of 8 byte wide (64 bits) data, or 9 bytes (72 bits) with ECC. All devices in a Rank are connected by a single Chip-Select. The actual memory size is not defined. Normally a module will have one rank per PCB side. Dual-rank modules can be used if a server supports them. These modules generall offer the best price/performance point but can limit overal system capacity or restrict future upgrade options.

  • Quad Rank Memory defines 4 sets of DRAM chips (on a module) each comprised of 8 byte wide (64 bits) data, or 9 bytes (72 bits) with ECC. All devices in a Rank are connected by a single Chip-Select. The actual memory size is not defined. Normally a module will have two ranks per PCB side.

General memory FAQs

  1. Can I mix and match different brands/type of memory?
    All Tyan motherboards are produced with performance in mind. When we talk about performance, it goes hand in hand with tolerances which must be met in order to reach the performance levels expected of high quality peripherals. When you mix memory types, brands or speeds on any high performance board, timing problems may significantly affect the stability, reliability and performance of the entire system. This is why we recommend using a single type of brand, speed, and type.

    Brands which have been tested and approved by Tyan are listed on the Memory Compatibility page: http://www.tyan.com/support_matrix_memory.aspx

    These brands have proven performance and compatibility records with all Tyan motherboard models. Depending on which motherboard you are using, you will need to buy different types of memory. Consult your users manual for the correct type to purchase then consult our memory compatibility partner pages for sales contacts. We highly recommend purchasing memory from one of the vendors listed on our web page to assure compatibility and performance.

  2. Can I mix and match ECC and non-ECC memory?
    It is not recommended to mix and match these two different type of memory designs. Motherboards will support either ECC or non-ECC but not both at the same time. Check the specifications of your motherboard to determine the type that is correct for your design.

  3. How does the BIOs handle memory timing values?
    The BIOS will use all the parameters from the memory's SPD for the memory controll functions. This is the industry specification for this type of functionality. The details of the SPD standard can be found in the JEDEC ballot JC-42.5-99-129 item 894A.

  4. Why do some of the Tyan bios versions allow the user to change some memory values?
    The default value comes from the memory SPD and not from the system BIOS. However some memory vendors have set aggressive values in the SPD and it will cause system errors or system instablity. The Tyan BIOS has provided a manual way to set all the clock timing inside setup to offer an alternative for setting this value. The officiallysupported memory listings do not need to have any alterations to memory timings to operate correctly.

General memory FAQs

  1. Why does only 1/2 of my memory show up during POST?
    This issue is caused by the SPD chips on your memory SIMM's which are not programmed correctly. SPD (Serial Presence Detect) is a feature available on a number of SDRAM DIMM modules that solves industry-wide compatibility problems by making it easier for the BIOS to properly configure the system to fit SDRAM/RDRAM performance profiles. The SPD device is an 8-pin serial EEPROM chip that stores information about the DIMM module's size, speed, voltage, drive strength, and number of row and column addresses. When the BIOS reads these parameters during POST, it automatically adjusts values in the CMOS Chipset Features screen for maximum reliability and performance. Without SPD, the BIOS (or user) must make assumptions about the DIMM's parameters.

    Try using a different brand of memory and the problem with the half amount showing will go away. It is also advised that you do not mix brands or types of memory. When you mix memory types, brands or speeds on any high performance board, timing problems may significantly affect the stability, reliability and performance of the entire system. This also leads to differently programmed SPD chips conflicting with one another and thus the problem you have described arises again.

    * There is only one BIOs core that allows you to change this feature.
    The BX chipset and the AMI bios have an option located inside the BIOs to allow either SPD reporting or AUTO reporting. If you have issues with the SPD reporting switch this option to AUTO and that should fix the problem. This allows the memory to be read directly from the memory chips instead of going directly through the SPD chip itself.


DDR FAQs

  1. What Tyan motherboards support Quad Rank memory arrangements?
    Quad-rank memory modules require special motherboard modifications and an enabled server bios to work properly. Unless a server is specifically designed to support quad-rank memory modules, they will not work. Ask your Tyan represenative for more detailed information about what servers would support this type of design.

  2. Can you mix and match different Ranks of memory?
    It is not recommended to mix or match different ranks of memory on the same motherboard. Make sure you use the same type of memory uniformily across the entire memory bus.

  3. I have memory which requires 2.75v to operate correctly. There is no option in the bios to adjust the memory voltage upwards. How do I get my memory to operate correctly if it requires more than what is stated in the spec sheet for my motherboard?
    Our design follows the JEDEC Standard for DDR400 VDD +2.6V ?0.1V DDR333, 266, VDD +2.5V ?0.2V. http://www.jedec.org/DOWNLOAD/search/JESD79D.pdf

    In order to support both DDR333 and DDR400 our DDR VDD is 2.6v. 2.75v is not a JEDEC spec and will contribute to modules that do follow specification to fail and over heat. This is not a BIOS adjustable value as it requires a hardware change. If the module requires 2.7v to work then it is not a supported solution for this motherboard.

  4. Why do I not see all 4GB of my memory when using a 32-bit based Windows OS and an AMD Opteron based motherboard?
    There is an option in the bios that will help you with your memory configuration.

    Go to the Chipset tab of the bios
    Go to the Memory Configuration portion
    Change the Adjust Memory option to AUTO

    Now what you have done here is allowed the bios to act in a more 64-bit friendly manner and this will allow you to better utilize your 4GB of memory for 64-bit based OS's or for PAE enabled/aware 32-bit OS's. This option is available for the S2880, S2881, S2882 and S2885 motherboards.

  5. Why do I not see all of my memory when using a 32-bit/64-bit based Windows or Linux OS and an AMD Opteron based motherboard?
    You need to first determine what stepping of AMD Opteron CPU that you are using. If you find out that you are using a D0 stepping or older then you need to go into the bios and make sure memory hole is set to software. If you determine that you have a Ex stepping CPU or newer then you need to make sure memory hole is set to hardware.

  6. Why do I not see all 4GB of memory during POST?
    The problem that you are seeing is based on an older architecture design for memory addressing. All the systems architecture up to this point were based on a maximum of 4GB of total memory. Nobody really thought, when this standard was designed, that this amount of memory would actually be in use. The problem that has happened is that you have PCI devices that require memory address ranges so that they can properly execute their commands. These address ranges were mapped in the upper sections of this maximum amount. Since nobody thought you would be using up to 4GB these address ranges started around the last 500MB of the memory ranges. This range is called the T.O.M. or Top of Memory range. This is the point in the bios where it places on hold the amount of memory that is required by the various PCI devices that are found on the motherboard. Thus when you have PCI cards or AGP cards installed on your motherboard these devices hold on to memory for their own use and take away from the maximum amount of memory that is available for other tasks. This amount of memory can vary from a little as 200MB all the way to 1GB of memory (or even more in select cases). It just depends on the PCI devices you have and the amount of PCI (including AGP) that you have installed all at once.

    There is really no way to get around this basic design limitation. The only way to get around these type of issues is to use certain new designs that have brand new architectures (i.e 64-bit designs) that allow memory to be mapped in area's above 4GB. The brand new Intel Xeon designs and the AMD Opteron designs are built around 64-bit technology. This is only ? of the equation that you would need to find success. You would also need to use an OS that is actually PAE or PAE aware so that it is able to address memory above the 4GB level. To find out about PAE you can search Microsofts website for PAE (Physical Address Extensions) and it will explain this concept and what OS's actually are capable of providing this benefit. Windows 2000 and Windows 2003 would fit both of these criteria. Windows XP on the hand would not allow this type of ability.

    Microsoft has addressed this type of issue in the following Microsoft Article (291988) http://support.microsoft.com/default.aspx?scid=kb;en-us;291988

  7. Why does my DDR400 memory now show speeds of DDR333 when I use more than 2 sticks of memory with my AMD Opteron based motherboard?
    The root of the issue and why you see this at this point is because this is essentially the way that AMD designed this chipset to run. If you look in Chapter 4 on pages 161 and 162 of the BIOS and Kernel Developer's Guide, you will see the recommended DIMM configuration table.

    You will note that depending on the number of ranks per module and the location of the modules on the board, the operating speed of the memory will change. Basically, if the modules are dual rank modules and the board is being fully loaded, AMD's recommendation is to down clock the memory to 333Mhz. However, if you are using single rank modules in a fully loaded system, full DDR400 speeds can be obtained. These are strictly recommendations by AMD and Tyan has followed those recommendations. Tyan has provided a method for customers to manually adjust the memory clock speed and that many customers have been able to run a fully loaded system with dual rank modules at DDR400 speeds without any problems with past bios versions. Keep in mind, this issue is related to the space and trace width on the board, the design of the memory modules used and the controller on the processor. . It is a combination of things that contribute to potential data integrity issues that led to AMD's recommendations for down clocking the memory to 333Mhz.

  8. Why do I have stability issues when I run more than a couple sticks of DDR400 memory with my AMD Opteron based motherboard?
    Make sure to double check the speed at which your memory is set to run in the bios. If you are running more than 2 sticks of double sided DDR400 memory then it is our recommendation to run that memory at 333MHz speed. Keep in mind, this issue is related to the space and trace width on the board, the design of the memory modules used and the memory controller on the CPU. Therefore, it is a combination of things that contribute to potential data integrity issues that led to our recommendations for down clocking the memory to 333Mhz.

    For more information about the recommendation from AMD about this aspect you can address it here.